A field that enables and/or disables an interrupt from a host processor to the DSP. The DSPINT bit is written from the host processor; a DSP write has no effect on the DSPINT bit. When DSPINT = 1, a DSP interrupt is generated. The host must write a 0 to the DSPINT bit while writing to the byte ordering bit (BOB) or DSP-to-host processor interrupt (HINT) bit, so that the host does not provoke an unwanted DSP interrupt. This bit is stored in the host port interface control (HPIC) register.